Samsung Electronics will manufacture a key component of Nvidia’s custom high-bandwidth memory chips using TSMC’s 3-nanometre process, according to industry sources cited by the Seoul Economic Daily. The collaboration, reported on Sunday, marks the first time the two companies have worked together on producing HBM technology. The component in question is the base die, which forms the logic layer at the bottom of an HBM stack and is critical for performance and power efficiency. This development reflects Nvidia’s strategy to secure advanced manufacturing capabilities for its AI accelerators, which rely heavily on HBM for rapid data processing. By insisting that its HBM suppliers adopt TSMC’s leading-edge 3nm node, Nvidia aims to improve yield, reduce latency, and enhance overall chip performance. TSMC’s 3nm process offers superior transistor density and power efficiency compared to older nodes, making it attractive for high-performance computing applications.
Samsung, while a major producer of HBM, will act as a foundry partner in this arrangement, outsourcing the base die fabrication to TSMC despite its own semiconductor capabilities. Why TSMC’s 3nm Node Matters The base die in an HBM stack manages communication between the memory layers and the GPU or processor, making its design and fabrication crucial. A more advanced process node allows for tighter integration of logic circuits, which can reduce signal delay and improve bandwidth efficiency. Industry analysts note that as AI models grow in size and complexity, demand for faster, more efficient memory interfaces increases. Using TSMC’s 3nm process could give Nvidia a competitive edge in performance per watt, particularly for its upcoming Blackwell and future GPU architectures. How Will This Affect Samsung’s Role in HBM Supply? Although Samsung is producing the base die, it will do so using TSMC’s process rather than its own.
This raises questions about Samsung’s internal foundry capabilities for advanced logic chips, especially as it competes with TSMC in the contract manufacturing space. Samsung has been investing heavily in its own 3nm GAAFET technology, but yield challenges have slowed adoption. Outsourcing this critical layer to TSMC may indicate a pragmatic approach to meeting Nvidia’s stringent requirements while preserving Samsung’s role in HBM assembly and packaging. Frequently Asked Questions What is the base die in an HBM stack? The base die is the bottom layer of a high-bandwidth memory stack that contains the logic circuitry responsible for interfacing with the processor and managing data flow to the upper memory layers.
Why is Nvidia insisting on TSMC’s 3nm process for HBM? Nvidia seeks improved performance, power efficiency, and reliability in its AI chips, and TSMC’s 3nm node offers superior transistor density and electrical characteristics compared to older or alternative processes.
Does this mean Samsung is no longer making HBM? No, Samsung remains involved in HBM production, but in this case it is outsourcing the fabrication of the base die to TSMC while likely handling other aspects such as memory die production, stacking, or packaging.